Hardware design of a digital logic circuit is often initiated by evaluating a prototype circuit that is programmed into a reconfigurable device such as a field programmable gate array (FPGA) or a programmable logic device (PLD). While this design approach has certain handicaps related to cost and optimal usage of logic elements, the advantages provided in using programmable devices for digital design has proved far more attractive and has been used by engineers for many years. To a large extent, the advantage of a digital programmable device lies in its flexibility to permit interconnection changes to be carried out at a primitive level that often extends down to the level of a logic gate, such as a NAND or an OR gate. This feature allows engineers to design and evaluate a wide variety of logic circuits using a single FPGA. In many situations, this level of design flexibility down to a logic gate is unnecessary. For example, certain standard circuit configurations such as flip-flops, counters and registers can be pre-designed into an FPGA thereby freeing the designer of the task and/or skills needed to implement such mundane functions. These pre-designed circuits are typically referred to as macros, and such macros have been incorporated into several FPGAs, often in conjunction with logic gate primitives that are also available for the digital designer.
While not necessarily referred to as macros, digital memories have also been incorporated into several FPGAs albeit to a limited extent dictated by market needs and costs. Digital memories as standalone devices have proven to provide a large degree of circuit density at relatively low costs, and hence are often used as independent integrated circuit packages located external to an FPGA package.
Unlike digital hardware design, analog hardware design involves a different set of requirements that are unique to analog circuits. Such requirements include interconnecting several discrete components such as transistors, resistors, and capacitors to form a circuit with minimal parasitic parameters so as to obtain maximum bandwidth response. These discrete components have to be selected from a wide variety of component values. For example, the value of a resistor for one circuit may be 100 ohms, while for a second circuit it may be 1.45 kilo ohms. Accommodating such a variety of values in such a variety of discrete components, to cater to flexible design of analog circuits inside a programmable/reconfigurable integrated circuit is a challenging task. This condition has led to limited implementations of programmable devices in the analog domain. One such device is termed a field programmable analog array (FPAA).
Various manufacturers have sought a convenient compromise by providing pre-configured circuits inside FPAAs akin to FPGA macros. Such pre-configured circuits include op amps, filters, and oscillators. This approach has several advantages in terms of optimizing space inside integrated circuits, providing good circuit performance due to optimal layout, and allowing engineers who are relatively unskilled in analog circuit design to incorporate analog circuits into their designs by using interconnections that can be configured by programming the FPAA.
On the other hand, this approach has proved very limiting to analog designers desirous of using an FPAA to create a design at a primitive level extending down to a transistor. Some manufacturers have sought to address this limitation by providing transistors, sometimes in array configurations, that can be programmably interconnected to each other together with some discrete analog elements such as resistors, that are also incorporated into an FPAA. The choice of the type of transistors and their performance parameters is often a compromise that is driven by the market and is often constrained by semiconductor integration technology.
While digital memory devices are very popular and widely available, analog memory devices are relatively obscure and are limited in their performance. Some manufacturers have utilized charge-storing elements such as capacitors that are configured as arrays. The charge-levels inside the capacitors are often digital in nature where certain charge-thresholds are utilized to represent binary as well as multi-level digital values. Typically, analog memory devices have been manufactured as standalone devices, and where integrated into FPAAs have provided limited performance characteristics.
It is therefore desirable to provide a programmable analog device that incorporates analog memory elements as well as discrete analog elements, specifically transistors, with maximum interconnect flexibility, programmable design parameters and optimal circuit density. It is even more desirable to integrate memory functionality together with transistor computational functionality inside a single common element. When such a common element, for example a transistor element that has analog storage capacity, is used independently or interconnected with other transistor elements inside the FPAA, the resulting configuration can provide computing as well as memory functions in a compact package. It is also desirable that various operating parameters of the transistor element, such as voltage bias, current flow, gain, and analog memory values may also be programmable. This feature will provide a level of programmability that extends beyond traditional FPAAs where the design engineer typically programs the interconnections inside the FPAA to create an analog circuit, but is unable to further program other circuit parameters, such as the operating parameters of a transistor contained in the analog circuit.